select XC0 as clock source and set capture mode REG_PIOB_ABSR |= mask_quad_B // choose peripheral option B
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REG_PIOB_PDR = mask_quad_B // activate peripheral function (disables all PIO functionality) REG_PIOB_ABSR |= mask_quad_A // choose peripheral option B
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REG_PIOB_PDR = mask_quad_A // activate peripheral function (disables all PIO functionality) activate peripheral functions for quad pins const int quad_A = 2 Ĭonst unsigned int mask_quad_A = digitalPinToBitMask(quad_A) Ĭonst unsigned int mask_quad_B = digitalPinToBitMask(quad_B) I didn't test using the Index pin for revolution counting yet. To use the hardware quadrature encoder the two traces need to be connected to digital pins 2 and 13 which correspond to the TIOA0 and TIOB0 peripheral pin function of the SAM3x8e. Using the following code and a motor with a 2 trace quadrature encoder I manage to make the REG_TC0_CV0 register measure the position of the motor. I got the hardware quadrature encoder running partially. I hope some one here on the forum will come up with an example so we can use this neat feature of this nice new Arduino I tried to implement the Quadrature Decoder in Atmel Studio but I cant program the Due from within Atmel Studio(yet) and since I'm not really great in programming this could be quite a task for me anyway I do not know if this header file works with the arduino IDE or Atmel Studio or if it only works with the keil compiler but maybe it is a starting point. #define TC_QISR_DIR (0x1u << 8) /**< \brief (TC_QISR) Direction */
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#define TC_QISR_QERR (0x1u << 2) /**< \brief (TC_QISR) Quadrature ERRor */ #define TC_QISR_DIRCHG (0x1u << 1) /**< \brief (TC_QISR) DIRection CHanGe */ * - TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register - */ #define TC_QIMR_QERR (0x1u << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ #define TC_QIMR_DIRCHG (0x1u << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ * - TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register - */ #define TC_QIDR_QERR (0x1u << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ #define TC_QIDR_DIRCHG (0x1u << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ * - TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register - */ #define TC_QIER_QERR (0x1u << 2) /**< \brief (TC_QIER) Quadrature ERRor */ #define TC_QIER_DIRCHG (0x1u << 1) /**< \brief (TC_QIER) DIRection CHanGe */ * - TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register - */ #define TC_BMR_MAXFILT(value) ((TC_BMR_MAXFILT_Msk & ((value) << TC_BMR_MAXFILT_Pos))) #define TC_BMR_MAXFILT_Msk (0x3fu << TC_BMR_MAXFILT_Pos) /**< \brief (TC_BMR) MAXimum FILTer */ #define TC_BMR_IDXPHB (0x1u << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ #define TC_BMR_SWAP (0x1u << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */
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#define TC_BMR_INVIDX (0x1u << 15) /**< \brief (TC_BMR) INVerted InDeX */ #define TC_BMR_INVB (0x1u << 14) /**< \brief (TC_BMR) INVerted phB */ #define TC_BMR_INVA (0x1u << 13) /**< \brief (TC_BMR) INVerted phA */ #define TC_BMR_EDGPHA (0x1u << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ #define TC_BMR_QDTRANS (0x1u << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ #define TC_BMR_SPEEDEN (0x1u << 10) /**< \brief (TC_BMR) SPEED ENabled */ #define TC_BMR_POSEN (0x1u << 9) /**< \brief (TC_BMR) POSition ENabled */ This part could be interesting for you: #define TC_BMR_QDEN (0x1u << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ This is a header file from Keil, it defines allot of registers and peripheral base adresses: Three QDEC pins are on a connector, the pinout is as dreschel came to the same point like you and nothing further